1. Field of the Invention
The present invention relates to a thin film transistor and a display device which includes the thin film transistor. More specifically, the present invention relates to an active matrix type liquid crystal display device which is a display device that uses a high-luminance light source.
2. Description of the Related Art
Recently, regarding flat panel displays such as liquid crystal displays (LCD), there are more proposals for various forms of apparatuses represented by keywords such as wearable and ubiquitous, more diversifications of use environments, and the like. Accordingly, demands for small and high-definition displays to be loaded in mobile smartphones and tablet terminals are being increased rapidly. In order to achieve small and high-definition LCD, it is essential to form fine patterns. However, the resolution limit in a process of manufacturing such as the minimum line width and the like cannot simply be overcome even when the pixel size is reduced. Therefore, in order to recover the deterioration in the brightness caused by decrease in the aperture ratio, the luminance of the backlight is also increased.
Further, other than the direct-view type displays described above, it is also proposed to be applied to head-up displays (HUD), for example. This is the use in which display contents shown via a magnifying optical system are reflected by window glass (front window) or a transparent screen to view the display information along with the actual scenery outside the window and it has been put to practical use in airplanes, vehicles, and the like. In such use, extremely intense light (e.g., 1,000,000 cd/m2 or more) compared to that of the direct-view type display is irradiated to a small display panel because of the brightness of the use environment, the light loss caused before it is visually recognized, and the like.
As described, the use of high-luminance light source is becoming expanded particularly in liquid crystal displays.
In the meantime, as a pixel-driving device of the small high-definition LCD, a low-temperature polycrystalline silicon (Poly-Si) TFT (Thin Film Transistor) that uses a polycrystalline silicon for a transistor active layer is used in many cases. The polycrystalline silicon TFT has a higher driving capacity compared to an amorphous silicon (a-Si) TFT, so the size of the element thereof can be reduced. Thus, the aperture ratio can be increased when used for a pixel. Further, a part of a driver circuit can be formed therewith. Therefore, the driver IC chip can be omitted, so that it is possible to decrease the size and to improve the reliability of the connection part.
The polycrystalline silicon TFT often employs an LDD (Lightly Doped Drain) structure in which impurity is lightly doped in an offset part between the channel region and the source-drain region to suppress a leakage current under an off state. However, the polycrystalline silicon TFT when used with the high-luminance backlight directly receives irradiation of 1,000,000 cd/m2 level, for example, so that leakage current under an off state is increased due to carriers generated by photoexcitation. Therefore, the influences of the light from the backlight to the polycrystalline silicon TFT cause display failures, operation malfunctions, and the like, e.g., deterioration in the contrast and increase in crosstalk, flicker, and the like. Thus, it is desired to suppress those.
Next, related techniques depicted in Patent Documents will be described.
In order to suppress such issues caused by the leakage current, Japanese Unexamined Patent Publication Hei 9-51099 (Abstract and the like) (Patent Document 1) suggests a technique in which a light-shielding layer is provided in a polycrystalline silicon active layer including a channel region, an LDD region, and a source-drain region via an insulating layer. With this technique, the conductive light-shielding layer works as a bottom gate electrode from the back surface (surface on the opposite side from the normal gate electrode) of the polycrystalline silicon active layer, thereby changing the transistor characteristic.
Japanese Unexamined Patent Publication 2001-66587 (Paragraph 0016 and the like) (Patent Document 2) suggests a structure in which a light-shielding layer is connected to an external power source to fix the potential of the light-shielding layer in order to suppress such change in the characteristic. However, the biggest issue of this technique is that the number of steps in the manufacture process is increased so that the cost is increased without questions.
As a technique for suppressing the off-leakage current while the light-shielding layer is being maintained in an electrically floating state, there is a following proposal that utilizes capacitance coupling.
WO 2011/027650 (Paragraphs 0020, 0021 and the like) (Patent Document 3) suggests a technique that, in a case of a light-shielding layer is adopted on a coplanar-type LDD transistor, the terminal voltages of the transistor and the capacitance between the light-shielding layer and the gate electrode are set so that the potential of the light-shielding layer becomes minus (or plus) at an off state.
In this technique, design indicators are acquired from the result of calculations based on an equivalent circuit. When judging the characteristics, only the leakage current at the off state is used, and both the terminal voltages of the transistor and the capacitance between the light-shielding layer and the gate electrode are settable parameters. Thus, this technique does not regulate a specific range regarding the geometrical shape of the transistor and the layout of the electrodes.
Japanese Unexamined Patent Publication Hei 8-211406 (Abstract and the like) (Patent Document 4) is an example of a case for regulating the geometrical shape of the transistor. In this example, the transistor is a top-gate type and has gate offset. In addition, its light-shielding layer has larger area than a polycrystalline silicon active layer. Patent Document 4 suggests a technique that suppresses the off-leakage current by the mutual relations regarding the static capacitances between the protruded area of light-shielding layer from the active layer and other conductive layers (each of the gate wiring, the data wiring, and the pixel electrode). The static capacitance between the electrodes is mostly determined according to the opposing area, so that it is considered a geometrical regulation.
With this technique, provided that the capacitance between the light-shielding layer and the gate wiring is Cg and the capacitance between the light-shielding layer and the data wiring or the pixel electrode is Cd, it is considered preferable to satisfy a following relation.0.6×Cg≤Cd≤5×Cg This expression can be transformed into a following relation.0.2≤Cg/Cd≤1.66
However, according to views and knowledge of the inventors et al., with the range shown in this expression, the fluctuation of the transistor characteristic when the drain voltage changes cannot fall within a preferable range.
As another example of a case for regulating the geometrical shape of the transistor, Japanese Unexamined Patent Publication Hei 10-70277 (Abstract and the like) (Patent Document 5) discloses a technique which, in a normal staggered type or inverted staggered type amorphous silicon thin film transistor, sets the capacitance between the light-shielding layer and the gate electrode to be three times or more than the capacitance between the light-shielding layer and the drain electrode. In this technique, it is mentioned that not only the capacitance but also the opposing area is also set to be three times or more.
The basis for setting those to be three times or more is so described that the potential of the light-shielding layer does not exceed the threshold voltage of the transistor. However, while the leakage current in the gate voltage to be off is extremely small, the current flown between the source and drain in a sub-threshold region having voltage of equal to or less than the threshold voltage is a current that is extremely large. Further, the fluctuation in the transistor characteristic caused due to the change in the drain voltage cannot be suppressed sufficiently by setting those about only three times.
The common point in Patent Documents 3, 4, and 5 mentioned above is that the capacitance of the light-shielding layer—the drain region and the capacitance of the light-shielding layer—the gate electrode are regulated in such a manner that the potential of the light-shielding layer satisfies a specific condition.
The first issue is that the transistor characteristic changes when a light-shielding layer is provided between a glass substrate and an active layer in a thin film transistor. The reason thereof is as follows.
In order to suppress the light leakage current caused by irradiation of high-intensity light, a light-shielding layer is provided so that the light is not directly irradiated to the thin film transistor. Assuming a case of a coplanar-type thin film transistor having a polycrystalline silicon active layer, the light-shielding layer is placed between the glass substrate and the polycrystalline silicon active layer and an underlying insulating layer is placed between the light-shielding layer and the active layer. The light-shielding layer is located on the lowermost layer, so that it goes through all the transistor manufacture processes executed thereafter. Thus, the light-shielding layer is required to be resistant for those processes. Naturally, the light-shielding layer is required to have the characteristic to shield the light. As the materials that can be used for the light-shielding layer, high melting point metals of such as chromium (Cr) and molybdenum (Mo) are the candidates.
However, the metal material to be the light-shielding layer is conductive, and it is placed in the vicinity of the polycrystalline silicon active layer and overlapped with the drain region for securely covering the channel region and the LDD region. Thus, the light-shielding layer comes to have a potential by the influence of the drain voltage, and the potential works on the active layer like the gate electrode, thereby changing the behavior for the original gate electrode potential. Particularly when the thin film transistor is used for the pixel of the active-matrix LCD, the potentials of the source and the drain of the transistor change every moment so that reversal of the source and drain in terms of the potentials may occur frequently. That is, depending on the drain voltage that changes greatly according to the operation state, the transistor characteristic is changed.
The change in the transistor characteristic influences the design margin. When designing a device such as a display device, a factor of fluctuation that may occur in the manufacture process, a factor of characteristic change that may occur in a long-term use process, and a narrow sense of operation margin are added to the minimum voltage required for driving to set the drive voltage. When the fluctuation in the transistor characteristic that depends on the drain voltage exceeds the operation margin, operation malfunctions are caused. In the meantime, when it is designed just to expand the operation margin, the performance of the device is to be sacrificed.
In Patent Documents 3, 4, and 5, regarding the current when the thin film transistor is off, the capacitance of the light-shielding layer—the drain region and the capacitance of the light-shielding layer—the gate electrode are regulated in such a manner that the potential of the light-shielding layer satisfies a specific condition. However, while the potential of the light-shielding layer is estimated, the point that the potential of the light-shielding layer works on the channel region of the active layer and the LDD region and influences the transistor characteristic is not sufficiently taken into consideration. For example, even when the light-shielding layers have a same potential, the influence upon the active layer, i.e., the extent in the changes in the characteristics, ought to vary when the film thickness of the underlying insulating layers are different. However, there is nothing mentioned about this points in each of Patent Documents.
The second issue is that the cost may be increased. Even though the potential of the light-shielding layer can be controlled by forming a structure which supplies some kind of potential to the light-shielding layer, the number of steps is increased so that the cost is increased without a question.
It is therefore an exemplary object of the present invention to exclude the above-described issues without adding any new steps and processes and employing a design to expand the operation margin other than providing a light-shielding layer via an underlying insulating layer, so as to achieve a thin film transistor which can suppress a light leakage current and characteristic fluctuation that may occur depending on the drain voltage even when a high-luminance backlight is used and, further, to achieve a display device such as a liquid crystal display using such thin film transistor.